Working Student - Digital Functional Verification (f/m/div)

Infineon Technologies AG · Dresden · up to 20 hours a week

WerkstudentGerman needed: none

Still open on 2 Nov

You apply on the company's own website.

Key facts

Hours: Up to 20 hours a week
Where you work: At the company
Language needed: English
Subject you study: Electrical Engineering, Computer Engineering, Computer Science

Experience research: Research and evaluate state-of-the-art verification concepts including SystemVerilog UVM, functional verification, and formal verification
Experience project work: Support verification and automation tasks within ongoing projects and help drive topics to completion
Focus on the future: Explore AI-based methods and applications for functional and formal verification in a practical project environment
Shape the future: Conduct research on how AI can improve verification efficiency, coverage, and analysis
Teamwork Is Dreamwork: Work closely with experienced verification engineers and contribute to real project work

Study Field: Currently enrolled in a technical degree program (e.g., electrical engineering, computer engineering, or computer science)
Strong problem-solving skills, with the ability to analyze complex technical issues and develop creative solutions
Collaborative team player with a proactive attitude who enjoys working closely with experienced engineers
Structured approach to work with strong organizational skills
Solid foundation in object-oriented programming and familiarity with Python and scripting languages
Good knowledge of digital circuit design principles, along with practical experience in Verilog and SystemVerilog and strong debugging skills
Familiarity with EDA tools (simulators, waveform debug, lint, formal) is a plus
Nice-to-Have Skills: Prior knowledge of SoC verification processes, especially SystemVerilog UVM, is highly preferred
Language skills: Good written and spoken English skills

Experience research: Research and evaluate state-of-the-art verification concepts including SystemVerilog UVM, functional verification, and formal verification
Experience project work: Support verification and automation tasks within ongoing projects and help drive topics to completion
Focus on the future: Explore AI-based methods and applications for functional and formal verification in a practical project environment
Shape the future: Conduct research on how AI can improve verification efficiency, coverage, and analysis
Teamwork Is Dreamwork: Work closely with experienced verification engineers and contribute to real project work

Study Field: Currently enrolled in a technical degree program (e.g., electrical engineering, computer engineering, or computer science)
Strong problem-solving skills, with the ability to analyze complex technical issues and develop creative solutions
Collaborative team player with a proactive attitude who enjoys working closely with experienced engineers
Structured approach to work with strong organizational skills
Solid foundation in object-oriented programming and familiarity with Python and scripting languages
Good knowledge of digital circuit design principles, along with practical experience in Verilog and SystemVerilog and strong debugging skills
Familiarity with EDA tools (simulators, waveform debug, lint, formal) is a plus
Nice-to-Have Skills: Prior knowledge of SoC verification processes, especially SystemVerilog UVM, is highly preferred
Language skills: Good written and spoken English skills